Hi, I'm Surajit Das, completed my PhD from the department of Computer Science and Engineering in Indian Institute of Technology Guwahati, India, under the supervision of Dr. Chandan Karfa and Prof. Santosh Biswas. I received Intel Fellowship at Post Doctoral Level and complete my postdoctoral research under the supervison of Intel India Formal Verification team, Dr. Chandan Karfa and Prof. Arijit Sur at IIT Guwahati. Currently I am working as a Faculty Fellow at Technology Innovation Hub, Indian Institute of Technology, IIT Guwahati.

My research interests include Formal Modeling and Verification, Network-on-Chip, Deadlock Detection and Avoidance. I have designed and developed a formal simulator for detection of confimred deadlock in Network-on-Chip. I am also interested to work with industrial project where I get an opportunity to utilise my research and coding skill.